In existing eFuse memory arrays, a voltage (e.g., voltage VPRG) higher than the normal operational voltage (e.g., voltage VDD) is commonly used to program the eFuse in the eFuse memory cell. For example, in some approaches, voltage VPRG is about 1.8 V while the normal operation voltage VDD is about 0.85 V. Depending on the configuration of the eFuses and/or the memory array, when an eFuse is programmed, some select (or program) transistors used to select the memory cells for programming are subject to a voltage stress from the high voltage VPRG. As a result, there is a need to improve the situations.
Like reference symbols in the various drawings indicate like elements.